Lecture 10

 

Lecture 10

 

• Two dimensional array pointers
  
  • Aa is the address of C(0,0)
    

    	0	1	2	3	4
    0	Aa
    1				c
    2

  • From 2-3 array index to vector index of imbedded 2-d array
    
• C = (i,j) à y = n*i + j
  
• From imbedded index to array indicies
  
• I=floor[y/n]
  
• J=rem[y/n]=y-floor[y/n]*n
  

Machine Language

 

• Instruction sequence of zeros and ones
  
• 32 bits
  
• Keep simple fixed size
  
• Simplicity of instruction implies regularity implies design simple
  
  • Instructions in MIPS are symbolic and must be mapped into binary numbers
    
  • L1 machine language and L2 MIPS assembly language are not too different
    
• Machine Language to Assembler
  
  • MIPS instruction is translated to 32 bit mc instruction
    
  • Translator follows rules for writing these statements as machine code
    
• Machine instruction basic format
  
  • Simplify and tradeoffs
    
    • Common fields
      
    • Common format
      
    • Fields have names
      
    • Instruction size fixed
      
• Field use depends on instruction type
  
• Type R arithmetic
  

Bits	6	5	5	5	5	6
High order	Op	Rs	Rt	Rd	Shamt	Funct	Low order

• Op is operation
  
• Rs and rt are source registers
  
  • First and second operands
    
• Rd is the 'register for destination
  

Bits	6	5	5	16
High order	Op	Rs	Rt	Address or constant	Low order

 

Example: add $t0 $s1 $s2

 

Add is the ops code, t0 is the destination s1, s2 are the operands

Translated

 

0	7	18	8	0	32
Op	Rs	Rt	Rd	Shamt	funct

 

^machine language in decimal

 

6	5	5	5	5	6
000000	10001	10010	01000	00000	100000
Op	Rs	Rt	Rd	Shamt	funct

^ machine language in binary / machine language code

 

• Using the MIPS instruction sheet
  
• Add(u)     reg0    reg1    reg2    type0x        order
  

  R20(21)        1,2,0
  

• This tells us the MIPS instruction format
  
• The purple tells us the machine format it changes to
  

  R 20 (21)    àr Type instruction
  

          àop code always 0 & funct code given as 20
  

  
   

  1,2,0    àorder of MIPS registers in machine format
  

          àreg1 àrs reg2àrt, reg0 àrd
  

  
   

  Machine format R type
  

  op rs rt rd shamt funct
  

 

CONSTANTS OR IMMEDIATE OPERANDS

• lw $t0, address Constantx($0)
  

  add $sp, $sp, $t0
  

  memory access: memory address of constant x
  

  t0 ßconstant x
  

• instruction with constant in it à no memory access
  

  addi $sp, $sp, 4    spß sp + 4
  

  addi $sp, $sp, -8    spßsp – 8
  

  
   

Op

Rs

Rt

Immediate constant

 

Constant can be negative: range [-32768, 32767]

 

• what if the constant is larger than 16 bits?
  
• Set upper (higher order) 16 bits to 255
  
  • #upper t0, ß 255
    
  • Use 'lui'
    
  • Example: lui $s0, 255
    

31 16	15 0
255	0

 

Example 2:

 

Lui $s0, 61

 

31 16	15 0
61	0

 

Addi $s0, $s0, 2304

31 16	15 0
61	2304

 

Becomes

0000|0000|0011|1101

0000|1001|0000|0000

 

 

JUMP INSTRUCTION

 

• J label à j exit
  
• J address à j 1000
  
• Jump to actual address in words
  

J TYPE FORMAT

 

Bits	6 31 26	26 25 0
High order	Op	address	Low order

 

Example:

 

J 1000

 

High order

2

1000

Low order

 

• The jump address is in words this increases the addressing space by four times
  

Addressing Space

 

• Note that only 26 bits in jump thus can address 2²⁶ = 67108864 different words or 228 = different bytes
  
• But we could have addresses up to 32 bits or 16 times as many if our address were in a 32 bit word
  
• This means all instructions of one program should be in one block of memory
  
• Means a program can be up to 6.7 million statements (assembly or machines language) without doing anything extra
  

Blocks from a memory with 32 bit addresses

0000	0001	0010	0011
0100	0101	0110	0111
1000	1001	1010	1011
1100	1101	11110	1111

 

CONDITIONAL BRANCH

 

bne    a,b,label

compare two operands (a and b) and go to label if the condition holds

if a C b then go to label

 

instruction format

Bits	6	5	5	16
High order	5	16	17	exit	Low order

 

PC RELATIVE ADDRESSING

 

 

• Is the word in the CPU for keeping track of the place of the next instruction location in main memory
  
• PC Register R + branch address
  
• 2³² cells in program all cells are nonnegative integers thus can use whole word no sign required
  
• 2³² = 4, 294, 867, 296 ~ 4 billion bytes = 1 billion words
  
• 4 gigabytes = 1 giga words
  
• Would register R be?
  
  • What should register R be?
    
  • Note: most conditional branching
    
    • Loops
      
    • If conditionals
      
    • Therefore close by close to where we are now in the program
      
• Therefore R = current PC
  

  
   

Summary of addressing modes

 

Register addressing	Operand is a register
Base or displacement	Operand is at the memory location whose address is sum of a register and a constant
Immediate addressing	Operand is a constant within the instruction
Pc relative addressing	Address is the sum of the PC plus the constant in the instruction
Psuedodirect addressing	Jump address is the 26 bits of the instruction concatenated with the upper bits of the PC